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Hardware Architecture

Authors and titles for recent submissions

[ total of 25 entries: 1-25 ]
[ showing 25 entries per page: fewer | more ]

Thu, 2 May 2024

[1]  arXiv:2405.00062 [pdf, ps, other]
Title: Hardware Accelerators for Autonomous Cars: A Review
Authors: Ruba Islayem, Fatima Alhosani, Raghad Hashem, Afra Alzaabi, Mahmoud Meribout
Comments: 14 pages, 15 figures, 4 tables
Subjects: Hardware Architecture (cs.AR); Robotics (cs.RO)
[2]  arXiv:2405.00314 (cross-list from cs.LG) [pdf, other]
Title: Model Quantization and Hardware Acceleration for Vision Transformers: A Comprehensive Survey
Authors: Dayou Du, Gu Gong, Xiaowen Chu
Subjects: Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR); Computer Vision and Pattern Recognition (cs.CV); Performance (cs.PF)

Wed, 1 May 2024

[3]  arXiv:2404.19735 [pdf, ps, other]
Title: Selective Parallel Loading of Large-Scale Compressed Graphs with ParaGrapher
Authors: Mohsen Koohi Esfahani, Marco D'Antonio, Syed Ibtisam Tauhidi, Thai Son Mai, Hans Vandierendonck
Subjects: Hardware Architecture (cs.AR); Performance (cs.PF); Software Engineering (cs.SE)
[4]  arXiv:2404.19381 [pdf, other]
Title: Low-overhead General-purpose Near-Data Processing in CXL Memory Expanders
Authors: Hyungkyu Ham, Jeongmin Hong, Geonwoo Park, Yunseon Shin, Okkyun Woo, Wonhyuk Yang, Jinhoon Bae, Eunhyeok Park, Hyojin Sung, Euicheol Lim, Gwangsun Kim
Subjects: Hardware Architecture (cs.AR)
[5]  arXiv:2404.19354 [pdf, other]
Title: PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC
Authors: Lucas Grativol Ribeiro (IMT Atlantique - MEE, Lab\_STICC\_BRAIn, Lab-STICC\_2AI, LHC), Lubin Gauthier (Lab\_STICC\_BRAIn, IMT Atlantique - MEE), Mathieu Leonardon (IMT Atlantique - MEE, Lab\_STICC\_BRAIn), Jérémy Morlier (IMT Atlantique - MEE, Lab\_STICC\_BRAIn), Antoine Lavrard-Meyer (IMT Atlantique), Guillaume Muller (Mines Saint-Étienne MSE, FAYOL-ENSMSE, FAYOL-ENSMSE), Virginie Fresse (LHC, TSE), Matthieu Arzel (IMT Atlantique - MEE, Lab-STICC\_2AI)
Journal-ref: ISCAS 2024 : IEEE International Symposium on Circuits and Systems, May 2024, Singapore, Singapore
Subjects: Hardware Architecture (cs.AR); Machine Learning (cs.LG)
[6]  arXiv:2404.19180 [pdf, other]
Title: MACO: Exploring GEMM Acceleration on a Loosely-Coupled Multi-core Processor
Authors: Bingcai Sui, Junzhong Shen, Caixia Sun, Junhui Wang, Zhong Zheng, Wei Guo
Subjects: Hardware Architecture (cs.AR)
[7]  arXiv:2404.19489 (cross-list from cs.CV) [pdf, other]
Title: EvGNN: An Event-driven Graph Neural Network Accelerator for Edge Vision
Authors: Yufeng Yang, Adrian Kneip, Charlotte Frenkel
Comments: 12 pages, 14 figures
Subjects: Computer Vision and Pattern Recognition (cs.CV); Hardware Architecture (cs.AR); Emerging Technologies (cs.ET); Neural and Evolutionary Computing (cs.NE)
[8]  arXiv:2404.19448 (cross-list from cs.RO) [pdf, other]
Title: Sensorized Soft Skin for Dexterous Robotic Hands
Authors: Jana Egli (1), Benedek Forrai (1), Thomas Buchner (1), Jiangtao Su (2), Xiaodong Chen (2), Robert K. Katzschmann (1) ((1) ETH Zurich, (2) Nanyang Technological University Singapore)
Comments: 6 pages, 9 figures ICRA 2024
Subjects: Robotics (cs.RO); Hardware Architecture (cs.AR)
[9]  arXiv:2404.19331 (cross-list from cs.PF) [pdf, other]
Title: Fusing Depthwise and Pointwise Convolutions for Efficient Inference on GPUs
Authors: Fareed Qararyah, Muhammad Waqar Azhar, Mohammad Ali Maleki, Pedro Trancoso
Subjects: Performance (cs.PF); Hardware Architecture (cs.AR); Distributed, Parallel, and Cluster Computing (cs.DC)
[10]  arXiv:2404.19246 (cross-list from cs.CR) [pdf, ps, other]
Title: Logistic Map Pseudo Random Number Generator in FPGA
Authors: Mateo Jalen Andrew Calderon, Lee Jun Lei Lucas, Syarifuddin Azhar Bin Rosli, Stephanie See Hui Ying, Jarell Lim En Yu, Maoyang Xiang, T. Hui Teo
Comments: 10 pages, 6 figures
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR)
[11]  arXiv:2404.19203 (cross-list from physics.app-ph) [pdf, ps, other]
Title: Thermal Performance of a Liquid-cooling Assisted Thin Wickless Vapor Chamber
Authors: Arani Mukhopadhyay, Anish Pal, Mohamad Jafari Gukeh, Constantine M. Megaridis (Mechanical and Industrial Engineering, University of Illinois Chicago, IL, US.)
Comments: Presented at IEEE ITherm (Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems) 2023. Orlando, FL, US. Corresponding: cmm@uic.edu
Subjects: Applied Physics (physics.app-ph); Hardware Architecture (cs.AR); Systems and Control (eess.SY)
[12]  arXiv:2404.19195 (cross-list from eess.SY) [pdf, ps, other]
Title: Evaluation of Thermal Performance of a Wick-free Vapor Chamber in Power Electronics Cooling
Authors: Arani Mukhopadhyay (1), Anish Pal (1), Congbo Bao (2), Mohamad Jafari Gukeh (1), Sudip K. Mazumder (2), Constantine M. Megaridis (1) ((1) Mechanical and Industrial Engineering, University of Illinois Chicago, IL, US. (2) Electrical and Computer Engineering, University of Illinois Chicago, IL, US.)
Comments: Presented at IEEE ITherm (Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems) 2023, Orlando FL. Corresponding author: cmm@uic.edu
Subjects: Systems and Control (eess.SY); Hardware Architecture (cs.AR); Applied Physics (physics.app-ph)

Tue, 30 Apr 2024

[13]  arXiv:2404.18562 [pdf, ps, other]
Title: Time Reversal for Near-Field Communications on Multi-chip Wireless Networks
Authors: Fátima Rodríguez-Galán, Ama Bandara, Elana Pereira de Santana, Peter Haring Bolívar, Eduard Alarcón, Sergi Abadal
Subjects: Hardware Architecture (cs.AR)
[14]  arXiv:2404.17701 [pdf, other]
Title: Embedded FPGA Developments in 130nm and 28nm CMOS for Machine Learning in Particle Detector Readout
Authors: Julia Gonski, Aseem Gupta, Haoyi Jia, Hyunjoon Kim, Lorenzo Rota, Larry Ruckman, Angelo Dragone, Ryan Herbst
Comments: 15 pages, 12 figures
Subjects: Hardware Architecture (cs.AR); Machine Learning (cs.LG); Instrumentation and Detectors (physics.ins-det)
[15]  arXiv:2404.18407 (cross-list from cs.CR) [pdf, other]
Title: ICMarks: A Robust Watermarking Framework for Integrated Circuit Physical Design IP Protection
Authors: Ruisi Zhang, Rachel Selina Rajarathnam, David Z. Pan, Farinaz Koushanfar
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR)
[16]  arXiv:2404.18396 (cross-list from cs.CR) [pdf, other]
Title: DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism
Authors: Ranyang Zhou, Jacqueline T. Liu, Nakul Kochar, Sabbir Ahmed, Adnan Siraj Rakin, Shaahin Angizi
Comments: 6 pages, 6 figures
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR)
[17]  arXiv:2404.18361 (cross-list from cs.DC) [pdf, other]
Title: Improving Multi-Instance GPU Efficiency via Sub-Entry Sharing TLB Design
Authors: Bingyao Li, Yueqi Wang, Tianyu Wang, Lieven Eeckhout, Jun Yang, Aamer Jaleel, Xulong Tang
Subjects: Distributed, Parallel, and Cluster Computing (cs.DC); Hardware Architecture (cs.AR)
[18]  arXiv:2404.18066 (cross-list from cs.NE) [pdf, other]
Title: Quantized Context Based LIF Neurons for Recurrent Spiking Neural Networks in 45nm
Authors: Sai Sukruth Bezugam, Yihao Wu, JaeBum Yoo, Dmitri Strukov, Bongjin Kim
Comments: 7 Pages, 7 Figures, 2 Tables
Subjects: Neural and Evolutionary Computing (cs.NE); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR); Computer Vision and Pattern Recognition (cs.CV); Neurons and Cognition (q-bio.NC)

Mon, 29 Apr 2024

[19]  arXiv:2404.16990 [pdf, other]
Title: Record Acceleration of the Two-Dimensional Ising Model Using High-Performance Wafer Scale Engine
Authors: Dirk Van Essendelf, Hayl Almolyki, Wei Shi, Terry Jordan, Mei-Yu Wang, Wissam A. Saidi
Comments: 13 pages, 5 figures, plus supplementary information
Subjects: Hardware Architecture (cs.AR); Materials Science (cond-mat.mtrl-sci)
[20]  arXiv:2404.17094 (cross-list from cs.LO) [pdf, other]
Title: TIUP: Effective Processor Verification with Tautology-Induced Universal Properties
Authors: Yufeng Li, Yiwei Ci, Qiusong Yang
Comments: Accepted by ASP-DAC 2024, please note that this is not the final camera-ready version
Subjects: Logic in Computer Science (cs.LO); Hardware Architecture (cs.AR); Systems and Control (eess.SY)

Fri, 26 Apr 2024

[21]  arXiv:2404.16629 [pdf, other]
Title: Implementing and Optimizing the Scaled Dot-Product Attention on Streaming Dataflow
Authors: Gina Sohn, Nathan Zhang, Kunle Olukotun
Comments: 4 pages, 3 figures
Subjects: Hardware Architecture (cs.AR)
[22]  arXiv:2404.16317 [pdf, other]
Title: FLAASH: Flexible Accelerator Architecture for Sparse High-Order Tensor Contraction
Authors: Gabriel Kulp, Andrew Ensinger, Lizhong Chen
Comments: 10 pages, 3 figures
Subjects: Hardware Architecture (cs.AR); Machine Learning (cs.LG)
[23]  arXiv:2404.16158 [pdf, other]
Title: The Feasibility of Implementing Large-Scale Transformers on Multi-FPGA Platforms
Authors: Yu Gao, Juan Camilo Vega, Paul Chow
Comments: 33 pages, 24 figures
Subjects: Hardware Architecture (cs.AR); Distributed, Parallel, and Cluster Computing (cs.DC); Machine Learning (cs.LG)
[24]  arXiv:2404.16256 (cross-list from cs.CR) [pdf, other]
Title: Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation
Authors: Aamer Jaleel, Stephen W. Keckler, Gururaj Saileshwar
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR)
[25]  arXiv:2404.16156 (cross-list from quant-ph) [pdf, other]
Title: Guardians of the Quantum GAN
Authors: Archisman Ghosh, Debarshi Kundu, Avimita Chatterjee, Swaroop Ghosh
Comments: 11 pages, 10 figures
Subjects: Quantum Physics (quant-ph); Hardware Architecture (cs.AR); Cryptography and Security (cs.CR); Machine Learning (cs.LG)
[ total of 25 entries: 1-25 ]
[ showing 25 entries per page: fewer | more ]

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